1. Field of the Invention
The present disclosure relates generally to a semiconductor fabrication and, more particularly, to a method for forming an Al interconnect with a TiN layer formed through a chemical vapor deposition process and a plasma treatment.
2. Background of the Related Art
In a semiconductor device fabrication, metallic interconnects are generally made of Al. However, in consideration of the low reliability of Al and the high integration degree of the semiconductor device, multi-layered structure comprising an Al layer and refractory layers such as a Ti layer or a TiN layer is used. That is, the multi-layered structure may comprise a Ti layer 13, a TiN layer 14, an Al layer 12 and an Anti-Reflective Coating 15 (hereinafter referred to as “ARC”) made of TiN on a substrate 11 in sequence as shown in FIG. 1a. In addition, another multi-layered structure may comprise a substrate 11, a Ti layer 13, an Al layer 12 and an ARC 15 as shown in FIG. 1b. 
In general, because a Chemical Vapor Deposition (hereinafter referred to as “CVD”) process does not provide an in-situ process as well as requires high temperature and has a low deposition rate, one of a Physical Vapor Deposition (hereinafter referred to as “PVD”) processes such as a sputtering process or an evaporation process has been mainly used to make the multi-layered structures.
Referring to FIG. 1a, both the Ti layer 13 and a TiN layer 14 are sequentially positioned under the Al layer 12. The TiN layer 14 and the Al layer 12 hardly react with each other and, therefore, undesired compound materials which generally have high resistance are not formed between the TiN layer 14 and the Al layer 12. Thus, the initial cross-sectional area of the Al layer 12 is maintained till the end of an interconnect formation process. However, the unreactivity leads to a weak adhesive strength between the Al layer 12 and the TiN layer 14 and, therefore, the Al layer 12 will be easily peeled off from the TiN layer 14. In addition, the [111] crystal growth direction of the Al layer 12 on the TiN layer 14 is much poorer than that of the Al layer 12 on the Ti layer 13. Thus, the poor [111] crystal growth direction of the Al on the TiN layer 14 significantly affects EMs (Electro-Migration), thereby deteriorating the reliability of semiconductor devices. Moreover, when a later cleaning process is performed to remove polymers in resulting interconnects using a predetermined solution, the Ti layer 13 may function as an electrode which causes galvanic corrosions. Furthermore, because the etching rate of the TiN layer 14 is two times lower than that of the Al layer 12, just a thin photoresist is allowed to be formed for a later etching process and, as a result, fine interconnects may be difficult to achieve.
On the other hand, if an Al layer 12 is deposited on an Ti layer 13 as shown in FIG. 1b, the crystal texture of the Al layer 12 grows toward the [111] crystal growth direction. Moreover, the adhesive strength between the Al layer 12 and the Ti layer 13 is enhanced, thereby preventing the Al layer 12 from being peeled off. However, the Ti layer 13 and the Al layer 12 easily react with each other, generating a TiAl3 layer 16 which is 3 times thicker than the Ti layer 13. The thick TiAl3 layer 16 has high resistance and will get even thicker by later processes. Thus, the cross-sectional area of the resulting Al layer 12 is much smaller than the initial design. In addition, voids may be created in the Al layer 12 by the stress due to the pulling of the TiAl3 layer 16.